diff options
| author | Chanho Park <[email protected]> | 2022-07-25 09:02:49 +0900 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2022-08-30 13:01:52 +0530 |
| commit | 55174159a2a67ffc1805c9ad662b7db39bd3d5fd (patch) | |
| tree | 5f7e11d7314f1f9bcbb8429799fb5fd586753ac7 | |
| parent | 533e13305c16c63915f7cc8a36ed7ef717e15378 (diff) | |
dt-bindings: phy: samsung,ufs-phy: match clock items
Below error is detected from dtbs_check. exynos7-ufs-phy is required
symbol clocks otherwise only PLL ref clock is required.
clock-names: ['ref_clk'] is too short
Reported-by: Krzysztof Kozlowski <[email protected]>
Suggested-by: Krzysztof Kozlowski <[email protected]>
Suggested-by: Alim Akhtar <[email protected]>
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml | 47 |
1 files changed, 37 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml index 8da99461e817..346eb7cf29a5 100644 --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml @@ -27,18 +27,12 @@ properties: - const: phy-pma clocks: - items: - - description: PLL reference clock - - description: symbol clock for input symbol ( rx0-ch0 symbol clock) - - description: symbol clock for input symbol ( rx1-ch1 symbol clock) - - description: symbol clock for output symbol ( tx0 symbol clock) + minItems: 1 + maxItems: 4 clock-names: - items: - - const: ref_clk - - const: rx1_symbol_clk - - const: rx0_symbol_clk - - const: tx0_symbol_clk + minItems: 1 + maxItems: 4 samsung,pmu-syscon: $ref: '/schemas/types.yaml#/definitions/phandle-array' @@ -62,6 +56,39 @@ required: - clock-names - samsung,pmu-syscon +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos7-ufs-phy + + then: + properties: + clocks: + items: + - description: PLL reference clock + - description: symbol clock for input symbol (rx0-ch0 symbol clock) + - description: symbol clock for input symbol (rx1-ch1 symbol clock) + - description: symbol clock for output symbol (tx0 symbol clock) + + clock-names: + items: + - const: ref_clk + - const: rx1_symbol_clk + - const: rx0_symbol_clk + - const: tx0_symbol_clk + + else: + properties: + clocks: + items: + - description: PLL reference clock + + clock-names: + items: + - const: ref_clk + additionalProperties: false examples: |