diff options
| author | Jiansong Chen <[email protected]> | 2020-02-10 17:00:28 +0800 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2020-07-15 12:46:00 -0400 |
| commit | 543aa2595c238aab6966366bd236b2beb5088d5e (patch) | |
| tree | 8bbbc9c1d2f781c6f287adb6e030aa425796fc89 | |
| parent | d463d8c964ddca698770f11d4ecb6da3bd656b4e (diff) | |
drm/amdgpu/soc15: add support for navy_flounder
Add soc support.
Signed-off-by: Jiansong Chen <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nv.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index a2ab80e681d7..665fb4c68e80 100644 --- a/drivers/gpu/drm/amd/amdgpu/nv.c +++ b/drivers/gpu/drm/amd/amdgpu/nv.c @@ -754,6 +754,12 @@ static int nv_common_early_init(void *handle) } adev->external_rev_id = adev->rev_id + 0x28; break; + case CHIP_NAVY_FLOUNDER: + adev->cg_flags = 0; + adev->pg_flags = 0; + adev->external_rev_id = adev->rev_id + 0x32; + break; + default: /* FIXME: not supported yet */ return -EINVAL; @@ -980,6 +986,7 @@ static int nv_common_set_clockgating_state(void *handle, case CHIP_NAVI14: case CHIP_NAVI12: case CHIP_SIENNA_CICHLID: + case CHIP_NAVY_FLOUNDER: adev->nbio.funcs->update_medium_grain_clock_gating(adev, state == AMD_CG_STATE_GATE); adev->nbio.funcs->update_medium_grain_light_sleep(adev, |