diff options
| author | Chen-Yu Tsai <[email protected]> | 2019-01-28 00:39:30 +0800 |
|---|---|---|
| committer | Maxime Ripard <[email protected]> | 2019-01-28 11:50:58 +0100 |
| commit | 52d9bcb3d0de3fa1e07aff3800f857836d30410d (patch) | |
| tree | e1ca9de0a7f16ec20110c8232ad73d53c6e3cfaa | |
| parent | 55ec26d6a4241363fa94f15377ebd8f1116fbfd7 (diff) | |
arm64: dts: allwinner: h6: Move GIC device node fix base address ordering
The GIC device node was placed out of order in the initial device tree
submission. Move it so the nodes are correctly sorted by base address
again.
Fixes: e54be32d0273 ("arm64: allwinner: h6: add the basical Allwinner H6 DTSI file")
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index d93a7add67e7..60bf6d915809 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -178,17 +178,6 @@ #reset-cells = <1>; }; - gic: interrupt-controller@3021000 { - compatible = "arm,gic-400"; - reg = <0x03021000 0x1000>, - <0x03022000 0x2000>, - <0x03024000 0x2000>, - <0x03026000 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - interrupt-controller; - #interrupt-cells = <3>; - }; - pio: pinctrl@300b000 { compatible = "allwinner,sun50i-h6-pinctrl"; reg = <0x0300b000 0x400>; @@ -239,6 +228,17 @@ }; }; + gic: interrupt-controller@3021000 { + compatible = "arm,gic-400"; + reg = <0x03021000 0x1000>, + <0x03022000 0x2000>, + <0x03024000 0x2000>, + <0x03026000 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupt-controller; + #interrupt-cells = <3>; + }; + mmc0: mmc@4020000 { compatible = "allwinner,sun50i-h6-mmc", "allwinner,sun50i-a64-mmc"; |