diff options
| author | Deng-Cheng Zhu <[email protected]> | 2014-03-06 17:05:27 -0800 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2014-03-11 23:10:55 +0100 |
| commit | 51061b8876a3906aa5bf173582f180596f9d6455 (patch) | |
| tree | 7a205930a8ae780f2d04a47865dcb4d595a0d075 | |
| parent | 031365b471e3268e3b8d6991b2cf0bae6b5e8bdc (diff) | |
MIPS: math-emu: Fix prefx detection and COP1X function field definition
When running applications which contain the instruction "prefx" on FPU-less
CPUs, a message "Illegal instruction" will be seen. This instruction is
supposed to be ignored by the FPU emulator. However, its current detection
and function field encoding are incorrect. This patch fix the issue.
Signed-off-by: Deng-Cheng Zhu <[email protected]>
Reviewed-by: Leonid Yegoshin <[email protected]>
Reviewed-by: Paul Burton <[email protected]>
Acked-by: David Daney <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/6608/
Signed-off-by: Ralf Baechle <[email protected]>
| -rw-r--r-- | arch/mips/include/uapi/asm/inst.h | 4 | ||||
| -rw-r--r-- | arch/mips/math-emu/cp1emu.c | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index b39ba25b41cc..f25181b19941 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h @@ -163,8 +163,8 @@ enum cop1_sdw_func { */ enum cop1x_func { lwxc1_op = 0x00, ldxc1_op = 0x01, - pfetch_op = 0x07, swxc1_op = 0x08, - sdxc1_op = 0x09, madd_s_op = 0x20, + swxc1_op = 0x08, sdxc1_op = 0x09, + pfetch_op = 0x0f, madd_s_op = 0x20, madd_d_op = 0x21, madd_e_op = 0x22, msub_s_op = 0x28, msub_d_op = 0x29, msub_e_op = 0x2a, nmadd_s_op = 0x30, diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 506925b2c3f3..0b4e2e38294b 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -1538,10 +1538,10 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, break; } - case 0x7: /* 7 */ - if (MIPSInst_FUNC(ir) != pfetch_op) { + case 0x3: + if (MIPSInst_FUNC(ir) != pfetch_op) return SIGILL; - } + /* ignore prefx operation */ break; |