diff options
| author | Marco Felsch <[email protected]> | 2020-02-27 12:06:05 +0100 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2020-03-11 15:37:13 +0800 |
| commit | 50f5b89a32ec69fa80601e575a99a062f0b4904e (patch) | |
| tree | 8d0bbda5527cb8a463a45eb58ad158a82461cdbd | |
| parent | 1f4e29d24b9da9854456cd3c517a8cf6bd2bfd67 (diff) | |
ARM: dts: imx6: phycore-som: add da9062 gpio support
The pmic is a mfd device and supports gpios. Those gpios are not routed
to the SoM baseboard pin header but they are connected to the i.MX6. We
need the GPIO's to configure the pmic to select between the
suspend/resume arm and soc voltages
Signed-off-by: Marco Felsch <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi index 356fe5673be9..a8ae654159a9 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi @@ -88,7 +88,7 @@ reg = <0x50>; }; - pmic@58 { + pmic: pmic@58 { compatible = "dlg,da9062"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; @@ -96,6 +96,8 @@ interrupt-parent = <&gpio1>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; + gpio-controller; + #gpio-cells = <2>; da9062_rtc: rtc { compatible = "dlg,da9062-rtc"; |