diff options
| author | Amit Kucheria <[email protected]> | 2019-03-29 15:42:07 +0530 |
|---|---|---|
| committer | Andy Gross <[email protected]> | 2019-04-09 23:08:17 -0500 |
| commit | 503250482c9c7759ee7c5bdc5d4f5e703cb1b417 (patch) | |
| tree | 5cdb5bbc6d1f5e3f27727af304b0638410a9019c | |
| parent | 9e98c678c2d6ae3a17cb2de55d17f69dddaa231b (diff) | |
arm64: dts: msm8998: thermal: split address space into two
We've earlier added support to split the register address space into TM
and SROT regions. Split up the regmap address space into two for msm8998
that has a similar register layout.
The order is important (TM before SROT) because we make an assumption
that SROT is always the second address space in order to support legacy
DTs.
Signed-off-by: Amit Kucheria <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8998.dtsi | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 3fd0769fe648..ac25e9142cbd 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -590,17 +590,19 @@ cell-index = <0>; }; - tsens0: thermal@10aa000 { + tsens0: thermal@10ab000 { compatible = "qcom,msm8998-tsens", "qcom,tsens-v2"; - reg = <0x10aa000 0x2000>; + reg = <0x10ab000 0x1000>, /* TM */ + <0x10aa000 0x1000>; /* SROT */ #qcom,sensors = <12>; #thermal-sensor-cells = <1>; }; - tsens1: thermal@10ad000 { + tsens1: thermal@10ae000 { compatible = "qcom,msm8998-tsens", "qcom,tsens-v2"; - reg = <0x10ad000 0x2000>; + reg = <0x10ae000 0x1000>, /* TM */ + <0x10ad000 0x1000>; /* SROT */ #qcom,sensors = <8>; #thermal-sensor-cells = <1>; |