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authorKrzysztof Kozlowski <[email protected]>2024-06-05 10:09:42 +0200
committerBjorn Andersson <[email protected]>2024-06-12 23:03:13 -0500
commit4da364c759dc66a23a4ea69cb85e038c847b9f0e (patch)
tree99c3e7884a2e3cd7e4c889f60afd29016ced1b65
parent8acff345c3e6b0c258177ba1db18d07ebd83183c (diff)
dt-bindings: clock: qcom,sm8550-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common qcom,gcc.yaml schema to unify the common parts of the binding. Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Rob Herring (Arm) <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml20
1 files changed, 4 insertions, 16 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml
index bad0260764d4..c17035a180db 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml
@@ -45,18 +45,6 @@ properties:
- description: Link clock from DP PHY3
- description: VCO DIV clock from DP PHY3
- '#clock-cells':
- const: 1
-
- '#reset-cells':
- const: 1
-
- '#power-domain-cells':
- const: 1
-
- reg:
- maxItems: 1
-
power-domains:
description:
A phandle and PM domain specifier for the MMCX power domain.
@@ -69,13 +57,13 @@ properties:
required:
- compatible
- - reg
- clocks
- - '#clock-cells'
- - '#reset-cells'
- '#power-domain-cells'
-additionalProperties: false
+allOf:
+ - $ref: qcom,gcc.yaml#
+
+unevaluatedProperties: false
examples:
- |