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authorMarc Zyngier <[email protected]>2024-04-19 11:29:28 +0100
committerMarc Zyngier <[email protected]>2024-04-20 12:42:51 +0100
commit4cc3f31914d6df9dba8825db933d19c60028f5a8 (patch)
treec9e041f845f8bf99b8a069e102d079c328415c2d
parentdd0717a998f77f449c70bee82626cbf9913fe78d (diff)
KVM: arm64: nv: Honor HFGITR_EL2.ERET being set
If the L1 hypervisor decides to trap ERETs while running L2, make sure we don't try to emulate it, just like we wouldn't if it had its NV bit set. The exception will be reinjected from the core handler. Reviewed-by: Joey Gouly <[email protected]> Reviewed-by: Oliver Upton <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Marc Zyngier <[email protected]>
-rw-r--r--arch/arm64/kvm/hyp/vhe/switch.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
index 390c7d99f617..26395171621b 100644
--- a/arch/arm64/kvm/hyp/vhe/switch.c
+++ b/arch/arm64/kvm/hyp/vhe/switch.c
@@ -220,7 +220,8 @@ static bool kvm_hyp_handle_eret(struct kvm_vcpu *vcpu, u64 *exit_code)
* Unless the trap has to be forwarded further down the line,
* of course...
*/
- if (__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_NV)
+ if ((__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_NV) ||
+ (__vcpu_sys_reg(vcpu, HFGITR_EL2) & HFGITR_EL2_ERET))
return false;
spsr = read_sysreg_el1(SYS_SPSR);