diff options
| author | Hersen Wu <[email protected]> | 2023-03-09 16:14:08 -0500 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-03-23 09:39:34 -0400 |
| commit | 4c94e57c258cb7800aa5f3a9d9597d91291407a9 (patch) | |
| tree | 80b1113daa96e8e812e1cf563b1fea8f7513abea | |
| parent | 2b072442f4962231a8516485012bb2d2551ef2fe (diff) | |
drm/amd/display: fix wrong index used in dccg32_set_dpstreamclk
[Why & How]
When merging commit 9af611f29034
("drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming"),
index change was not picked up.
Cc: [email protected]
Cc: Mario Limonciello <[email protected]>
Fixes: 9af611f29034 ("drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming")
Reviewed-by: Qingqing Zhuo <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c index e4472c6be6c3..3fb4bcc34353 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c @@ -271,8 +271,7 @@ static void dccg32_set_dpstreamclk( dccg32_set_dtbclk_p_src(dccg, src, otg_inst); /* enabled to select one of the DTBCLKs for pipe */ - switch (otg_inst) - { + switch (dp_hpo_inst) { case 0: REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, |