diff options
| author | Arnd Bergmann <[email protected]> | 2024-06-27 16:39:15 +0200 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2024-06-27 16:39:16 +0200 |
| commit | 4bd85abedac99b87e6861ad91880661289d4367c (patch) | |
| tree | 4802b176b4639555e74cbb5ac21607f102077f42 | |
| parent | 02295aa2a4612d5fd8f8e5091325c694ed7706b1 (diff) | |
| parent | 1536dc8edc653e0e4a333035a73ff146d0517749 (diff) | |
Merge tag 'socfpga_dts_updates_for_v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt
SoCFPGA DTS updates for v6.11
- Drop unneeded flash address
- Add L2 Cache info for Stratix10
* tag 'socfpga_dts_updates_for_v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: socfpga: stratix10: add L2 cache info
arm64: dts: n5x: socdk: drop unneeded flash address/size-cells
arm64: dts: agilex: socdk: drop unneeded flash address/size-cells
arm64: dts: stratix10: socdk_nand: drop unneeded flash address/size-cells
arm64: dts: stratix10: socdk: drop unneeded flash address/size-cells
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
5 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index cbbc53c47921..0def0b0daaf7 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -34,6 +34,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x0>; }; @@ -41,6 +42,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x1>; }; @@ -48,6 +50,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x2>; }; @@ -55,8 +58,15 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&l2_shared>; reg = <0x3>; }; + + l2_shared: cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; }; firmware { diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts index 26173f0b0051..4eee777ef1a1 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -180,8 +180,6 @@ &qspi { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts index 81d0e914a77c..7c53cb9621e5 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts @@ -169,8 +169,6 @@ &qspi { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts index ad99aefeb185..b31cfa6b802d 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts @@ -106,8 +106,6 @@ &qspi { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts index 2d70a92c2090..7952c7f47cc2 100644 --- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts @@ -83,8 +83,6 @@ &qspi { status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; |