diff options
author | Liu, Zhan <[email protected]> | 2021-09-02 15:08:29 -0400 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2021-09-23 15:17:30 -0400 |
commit | 4b7786d87fb3adf3e534c4f1e4f824d8700b786b (patch) | |
tree | 1ae655fb045a2290c4f623a35a056edcffdb97ae | |
parent | d51fc42adae665cd2ca16be3f46d1c2bbb668036 (diff) |
drm/amd/display: Fix DCN3 B0 DP Alt Mapping
[Why]
DCN3 B0 has a mux, which redirects PHYC and PHYD to PHYF and PHYG.
[How]
Fix DIG mapping.
Reviewed-by: Charlene Liu <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Zhan Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c index 613d34bde7dd..a823a64d02a5 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c @@ -1383,6 +1383,12 @@ static struct stream_encoder *dcn31_stream_encoder_create( return NULL; } + if (ctx->asic_id.chip_family == FAMILY_YELLOW_CARP && + ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { + if ((eng_id == ENGINE_ID_DIGC) || (eng_id == ENGINE_ID_DIGD)) + eng_id = eng_id + 3; // For B0 only. C->F, D->G. + } + dcn30_dio_stream_encoder_construct(enc1, ctx, ctx->dc_bios, eng_id, vpg, afmt, &stream_enc_regs[eng_id], |