diff options
| author | Bartosz Golaszewski <[email protected]> | 2023-03-09 11:37:51 +0100 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-03-21 19:51:42 -0700 |
| commit | 4b6c4249069694a593f3b4c3d81c75a5053b7693 (patch) | |
| tree | 38d2659a6474b9347292860bc9685f51525e110e | |
| parent | 41ae5ca448c21a82a2f07e10954b043a0d45a811 (diff) | |
arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port
Enable the high-speed UART port connected to the GNSS controller on the
sa8775p-adp development board.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index d01ca3a9ee37..cba7c8116141 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -13,6 +13,7 @@ aliases { serial0 = &uart10; + serial1 = &uart12; i2c18 = &i2c18; spi16 = &spi16; }; @@ -66,6 +67,32 @@ drive-strength = <2>; bias-pull-up; }; + + qup_uart12_default: qup-uart12-state { + qup_uart12_cts: qup-uart12-cts-pins { + pins = "gpio52"; + function = "qup1_se5"; + bias-disable; + }; + + qup_uart12_rts: qup-uart12-rts-pins { + pins = "gpio53"; + function = "qup1_se5"; + bias-pull-down; + }; + + qup_uart12_tx: qup-uart12-tx-pins { + pins = "gpio54"; + function = "qup1_se5"; + bias-pull-up; + }; + + qup_uart12_rx: qup-uart12-rx-pins { + pins = "gpio55"; + function = "qup1_se5"; + bias-pull-down; + }; + }; }; &uart10 { @@ -75,6 +102,12 @@ status = "okay"; }; +&uart12 { + pinctrl-0 = <&qup_uart12_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &xo_board_clk { clock-frequency = <38400000>; }; |