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authorMark Brown <[email protected]>2023-09-29 16:26:06 +0200
committerStephen Boyd <[email protected]>2023-10-09 20:31:22 -0700
commit4b58a0144b1b041818f89851eea87606a3cd80a1 (patch)
tree8a18a529e08054e3559d0f38f938e8340595e346
parentdf43983922c2307ff0b796913e0ca614f8f51705 (diff)
clk: versaclock3: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
-rw-r--r--drivers/clk/clk-versaclock3.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c
index a5ab48ff242c..b4a89c083c11 100644
--- a/drivers/clk/clk-versaclock3.c
+++ b/drivers/clk/clk-versaclock3.c
@@ -589,7 +589,7 @@ static const struct clk_ops vc3_clk_mux_ops = {
static const struct regmap_config vc3_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
- .cache_type = REGCACHE_RBTREE,
+ .cache_type = REGCACHE_MAPLE,
.max_register = 0x24,
};