diff options
author | Ville Syrjälä <[email protected]> | 2024-04-05 00:34:28 +0300 |
---|---|---|
committer | Rodrigo Vivi <[email protected]> | 2024-04-08 13:10:03 -0400 |
commit | 4a36e46df7aa781c756f09727d37dc2783f1ee75 (patch) | |
tree | 270f2a284cf3d7a810868fba55ea11a210f30bef | |
parent | 0653d501409eeb9f1deb7e4c12e4d0d2c9f1cba1 (diff) |
drm/i915: Disable live M/N updates when using bigjoiner
All joined pipes share the same transcoder/timing generator.
Currently we just do the commits per-pipe, which doesn't really
work if we need to change the timings at the same time. For
now just disable live M/N updates when bigjoiner is needed.
Cc: [email protected]
Tested-by: Vidya Srinivas <[email protected]>
Reviewed-by: Arun R Murthy <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Signed-off-by: Ville Syrjälä <[email protected]>
(cherry picked from commit ef79820db723a2a7c229a7251c12859e7e25a247)
Signed-off-by: Rodrigo Vivi <[email protected]>
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index abd62bebc46d..e583515f9b25 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2725,7 +2725,11 @@ intel_dp_drrs_compute_config(struct intel_connector *connector, intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode); int pixel_clock; - if (has_seamless_m_n(connector)) + /* + * FIXME all joined pipes share the same transcoder. + * Need to account for that when updating M/N live. + */ + if (has_seamless_m_n(connector) && !pipe_config->bigjoiner_pipes) pipe_config->update_m_n = true; if (!can_enable_drrs(connector, pipe_config, downclock_mode)) { |