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authorJames Hogan <[email protected]>2017-05-31 16:19:49 +0100
committerRalf Baechle <[email protected]>2017-06-28 12:22:40 +0200
commit4915e1b043d6286928207b1f6968197b50407294 (patch)
treed931d80c381c3f3da1796cd2c0998dbeba186660
parent49955d84cd9ccdca5a16a495e448e1a06fad9e49 (diff)
MIPS: Fix mips_atomic_set() with EVA
EVA linked loads (LLE) and conditional stores (SCE) should be used on EVA kernels for the MIPS_ATOMIC_SET operation of the sysmips system call, or else the atomic set will apply to the kernel view of the virtual address space (potentially unmapped on EVA kernels) rather than the user view (TLB mapped). Signed-off-by: James Hogan <[email protected]> Cc: [email protected] Cc: <[email protected]> # 3.15.x- Patchwork: https://patchwork.linux-mips.org/patch/16151/ Signed-off-by: Ralf Baechle <[email protected]>
-rw-r--r--arch/mips/kernel/syscall.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 3e5d82e744ac..863f958c126c 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -29,6 +29,7 @@
#include <linux/sched/task_stack.h>
#include <asm/asm.h>
+#include <asm/asm-eva.h>
#include <asm/branch.h>
#include <asm/cachectl.h>
#include <asm/cacheflush.h>
@@ -131,9 +132,11 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
__asm__ __volatile__ (
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" li %[err], 0 \n"
- "1: ll %[old], (%[addr]) \n"
+ "1: \n"
+ user_ll("%[old]", "(%[addr])")
" move %[tmp], %[new] \n"
- "2: sc %[tmp], (%[addr]) \n"
+ "2: \n"
+ user_sc("%[tmp]", "(%[addr])")
" beqz %[tmp], 4f \n"
"3: \n"
" .insn \n"