diff options
author | Christopher Obbard <[email protected]> | 2024-06-11 00:42:38 +0100 |
---|---|---|
committer | Shawn Guo <[email protected]> | 2024-06-17 10:11:33 +0800 |
commit | 4880ee1c9046c88c7cadea5d8bc20bc51d79662b (patch) | |
tree | 905709ee5b93d73f7a765aef92b14686b3045f51 | |
parent | 1d8a9f043a770d0b278581ae87fb7c98471f4996 (diff) |
arm64: dts: imx8mp-debix-model-a: Enable HDMI output
Enable the HDMI output on the Debix Model A SBC, using the HDMI encoder
present in the i.MX8MP SoC.
This has been tested with a generic 1080p HDMI display, along with a
smaller 1280x800 HDMI display.
Signed-off-by: Christopher Obbard <[email protected]>
Reviewed-by: Laurent Pinchart <[email protected]>
Tested-by: Laurent Pinchart <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts index 9b8f97a84e61..af02af9e5334 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts @@ -20,6 +20,18 @@ stdout-path = &uart2; }; + hdmi-connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_out>; + }; + }; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -94,6 +106,28 @@ }; }; +&hdmi_pvi { + status = "okay"; +}; + +&hdmi_tx { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; + status = "okay"; + + ports { + port@1 { + hdmi_tx_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; +}; + +&hdmi_tx_phy { + status = "okay"; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -239,6 +273,10 @@ status = "okay"; }; +&lcdif3 { + status = "okay"; +}; + &snvs_pwrkey { status = "okay"; }; @@ -356,6 +394,15 @@ >; }; + pinctrl_hdmi: hdmigrp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 |