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authorKonrad Dybcio <[email protected]>2022-05-01 20:40:16 +0200
committerBjorn Andersson <[email protected]>2022-06-25 15:12:44 -0500
commit47bf59c4755930f616dd90c8c6a85f40a6d347ea (patch)
treebd31f45b246cb1cc071d73f18b3b50336ba23fd3
parentde9b3d9616078f1d1d0d51b01cdafa101733f935 (diff)
arm64: dts: qcom: msm8994: Fix CPU6/7 reg values
CPU6 and CPU7 were mistakengly pointing to CPU5 reg. Fix it. Fixes: 02d8091bbca0 ("arm64: dts: qcom: msm8994: Add a proper CPU map") Signed-off-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
-rw-r--r--arch/arm64/boot/dts/qcom/msm8994.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index 0318d42c5736..1ac2913b182c 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -100,7 +100,7 @@
CPU6: cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x101>;
+ reg = <0x0 0x102>;
enable-method = "psci";
next-level-cache = <&L2_1>;
};
@@ -108,7 +108,7 @@
CPU7: cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x101>;
+ reg = <0x0 0x103>;
enable-method = "psci";
next-level-cache = <&L2_1>;
};