diff options
| author | Fabio Estevam <[email protected]> | 2016-04-25 17:37:17 -0300 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2016-04-26 19:52:20 +0800 |
| commit | 46350b71a09ccf3573649e03db55d4b61d5da231 (patch) | |
| tree | 17755c77a64a90fd558268920bd9bd9273c9b47e | |
| parent | fe4266baba600218e076e01bc446e36f30e85d29 (diff) | |
ARM: dts: imx6dl: Fix the VDD_ARM_CAP voltage for 396MHz operation
Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015):
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf
states the following:
"LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation
up to 396 MHz."
So fix the entry by adding the 25mV margin value as done in the other
entries of the table, which results in 1.15V for 396MHz operation.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
| -rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index c13a73aa55ca..9a4c22c2dade 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -30,7 +30,7 @@ /* kHz uV */ 996000 1250000 792000 1175000 - 396000 1075000 + 396000 1150000 >; fsl,soc-operating-points = < /* ARM kHz SOC-PU uV */ |