diff options
| author | Frank Li <[email protected]> | 2024-02-27 14:30:47 -0500 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2024-03-29 11:11:02 +0800 |
| commit | 43c7953ee3526f8f580f151d0f51089931eda8c7 (patch) | |
| tree | 1fcfcdc9c5f57f5825c2345ba1321d9bdafb94e2 | |
| parent | ac931ade1c7d9bc55c418aaa293448da9a5f725e (diff) | |
arm64: dts: imx8qm-mek: add lpspi2 support
Add lpspi2 support for imx8qm-mek board.
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index 0c4972724b04..66e0400d7bf8 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -85,6 +85,21 @@ status = "okay"; }; +&lpspi2 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpspi2 &pinctrl_lpspi2_cs>; + cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>; + status = "okay"; + + spidev0: spi@0 { + reg = <0>; + compatible = "rohm,dh2228fv"; + spi-max-frequency = <30000000>; + }; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; @@ -169,6 +184,20 @@ >; }; + pinctrl_lpspi2: lpspi2grp { + fsl,pins = < + IMX8QM_SPI2_SCK_DMA_SPI2_SCK 0x06000040 + IMX8QM_SPI2_SDO_DMA_SPI2_SDO 0x06000040 + IMX8QM_SPI2_SDI_DMA_SPI2_SDI 0x06000040 + >; + }; + + pinctrl_lpspi2_cs: lpspi2csgrp { + fsl,pins = < + IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 0x21 + >; + }; + pinctrl_lpuart0: lpuart0grp { fsl,pins = < IMX8QM_UART0_RX_DMA_UART0_RX 0x06000020 |