diff options
| author | Johan Hovold <[email protected]> | 2023-02-02 16:54:42 +0100 |
|---|---|---|
| committer | Alexandre Belloni <[email protected]> | 2023-02-25 23:34:22 +0100 |
| commit | 430aa33a304654704c16ed7bbbcbec9e9686aa81 (patch) | |
| tree | 0e1e183db8c154c59143910f4a4b9fa0cffef26d | |
| parent | c978414bf5190c0474d3c98df95228c2635b6021 (diff) | |
dt-bindings: rtc: qcom-pm8xxx: add nvmem-cell offset
On many Qualcomm platforms the PMIC RTC control and time registers are
read-only so that the RTC time can not be updated. Instead an offset
needs be stored in some machine-specific non-volatile memory, which a
driver can take into account.
Add an 'offset' nvmem cell which can be used to store a 32-bit offset
from the Unix epoch so that the RTC time can be updated on such
platforms.
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Reviewed-by: David Collins <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Alexandre Belloni <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml b/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml index 21c8ea08ff0a..b95a69cc9ae0 100644 --- a/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml @@ -40,6 +40,16 @@ properties: description: Indicates that the setting of RTC time is allowed by the host CPU. + nvmem-cells: + items: + - description: + four-byte nvmem cell holding a little-endian offset from the Unix + epoch representing the time when the RTC timer was last reset + + nvmem-cell-names: + items: + - const: offset + wakeup-source: true required: @@ -69,6 +79,8 @@ examples: compatible = "qcom,pm8921-rtc"; reg = <0x11d>; interrupts = <0x27 0>; + nvmem-cells = <&rtc_offset>; + nvmem-cell-names = "offset"; }; }; }; |