diff options
| author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2023-06-27 15:28:56 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 11:35:05 -0500 |
| commit | 420c6a6f65f4856f77dba278ae32e2701d8838f3 (patch) | |
| tree | caeb123b430b3397e0692d854ea01222af8ff47d | |
| parent | 807e7cee6981d9c570f986bebc07829094acb3cb (diff) | |
drm/xe: fix HuC FW ordering for DG1
The firmware definitions must be ordered based on platform, from newer
to older, which means that the DG1 FW must come before the ADL one.
Link: https://gitlab.freedesktop.org/drm/intel/-/issues/8699
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20230627222856.3165647-1-daniele.ceraolospurio@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
| -rw-r--r-- | drivers/gpu/drm/xe/xe_uc_fw.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c index 2b9b9b4a6711..bc63c0d3e33a 100644 --- a/drivers/gpu/drm/xe/xe_uc_fw.c +++ b/drivers/gpu/drm/xe/xe_uc_fw.c @@ -111,9 +111,9 @@ struct fw_blobs_by_type { fw_def(TIGERLAKE, major_ver(i915, guc, tgl, 70, 5)) #define XE_HUC_FIRMWARE_DEFS(fw_def, mmp_ver, no_ver) \ + fw_def(DG1, no_ver(i915, huc, dg1)) \ fw_def(ALDERLAKE_P, no_ver(i915, huc, tgl)) \ fw_def(ALDERLAKE_S, no_ver(i915, huc, tgl)) \ - fw_def(DG1, no_ver(i915, huc, dg1)) \ fw_def(ROCKETLAKE, no_ver(i915, huc, tgl)) \ fw_def(TIGERLAKE, no_ver(i915, huc, tgl)) |