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authorJohan Hovold <[email protected]>2022-08-31 10:15:25 +0200
committerJohan Hovold <[email protected]>2022-08-31 15:51:06 +0200
commit41ca302a697b64a3dab4676e01d0d11bb184737d (patch)
tree9f9c154c47adc362f05c830259ef421877ffe3c4
parent8e83622ae7ca481c76c8fd9579877f6abae64ca2 (diff)
USB: serial: ch341: fix disabled rx timer on older devices
At least one older CH341 appears to have the RX timer enable bit inverted so that setting it disables the RX timer and prevents the FIFO from emptying until it is full. Only set the RX timer enable bit for devices with version newer than 0x27 (even though this probably affects all pre-0x30 devices). Reported-by: Jonathan Woithe <[email protected]> Tested-by: Jonathan Woithe <[email protected]> Link: https://lore.kernel.org/r/[email protected] Fixes: 4e46c410e050 ("USB: serial: ch341: reinitialize chip on reconfiguration") Cc: [email protected] # 4.10 Signed-off-by: Johan Hovold <[email protected]>
-rw-r--r--drivers/usb/serial/ch341.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 2bcce172355b..af01a462cc43 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -253,8 +253,12 @@ static int ch341_set_baudrate_lcr(struct usb_device *dev,
/*
* CH341A buffers data until a full endpoint-size packet (32 bytes)
* has been received unless bit 7 is set.
+ *
+ * At least one device with version 0x27 appears to have this bit
+ * inverted.
*/
- val |= BIT(7);
+ if (priv->version > 0x27)
+ val |= BIT(7);
r = ch341_control_out(dev, CH341_REQ_WRITE_REG,
CH341_REG_DIVISOR << 8 | CH341_REG_PRESCALER,