diff options
| author | Ville Syrjälä <[email protected]> | 2021-02-03 11:30:44 +0200 |
|---|---|---|
| committer | Ville Syrjälä <[email protected]> | 2021-02-05 14:48:22 +0200 |
| commit | 41751b3e5c1ac656a86f8d45a8891115281b729e (patch) | |
| tree | 76004a267e4ea58c920cfb4297d56cc82200c5cb | |
| parent | 7962893ecb853aa7c8925ce237ab6c4274cfc1c7 (diff) | |
drm/i915: Reject 446-480MHz HDMI clock on GLK
The BXT/GLK DPLL can't generate certain frequencies. We already
reject the 233-240MHz range on both. But on GLK the DPLL max
frequency was bumped from 300MHz to 594MHz, so now we get to
also worry about the 446-480MHz range (double the original
problem range). Reject any frequency within the higher
problematic range as well.
Cc: [email protected]
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3000
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Mika Kahola <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_hdmi.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 66e1ac3887c6..b593a71e6517 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -2218,7 +2218,11 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi, has_hdmi_sink)) return MODE_CLOCK_HIGH; - /* BXT DPLL can't generate 223-240 MHz */ + /* GLK DPLL can't generate 446-480 MHz */ + if (IS_GEMINILAKE(dev_priv) && clock > 446666 && clock < 480000) + return MODE_CLOCK_RANGE; + + /* BXT/GLK DPLL can't generate 223-240 MHz */ if (IS_GEN9_LP(dev_priv) && clock > 223333 && clock < 240000) return MODE_CLOCK_RANGE; |