diff options
| author | Zhu YiXin <[email protected]> | 2023-05-19 12:45:55 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2023-05-31 12:20:24 -0500 |
| commit | 40994ce0ea010b1843e620bacc26d29ddebfc08d (patch) | |
| tree | 07f8427a636d6735aaacf01d3c53bbef0f338b8f | |
| parent | ac9a78681b921877518763ba0e89202254349d1b (diff) | |
MAINTAINERS: Add Chuanhua Lei as Intel LGM GW PCIe maintainer
Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINERS entry
for the PCIe driver for Intel LGM GW SoC.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Zhu YiXin <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Rahul Tanwar <[email protected]>
Acked-by: Lei Chuanhua <[email protected]>
| -rw-r--r-- | MAINTAINERS | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 7e0b87d5aa2e..31c4e5e9c411 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16349,7 +16349,7 @@ F: Documentation/devicetree/bindings/pci/intel,keembay-pcie* F: drivers/pci/controller/dwc/pcie-keembay.c PCIE DRIVER FOR INTEL LGM GW SOC -M: Rahul Tanwar <[email protected]> +M: Chuanhua Lei <[email protected]> S: Maintained F: Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml |