diff options
| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-03-16 15:12:59 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-04-04 20:18:31 -0700 |
| commit | 3f54391526b407a419d2dfd4055fdc9e6e223551 (patch) | |
| tree | 545f30743070a4572a873007b34d64aacf7b9873 | |
| parent | 2f51d9231485250c0e4cf4d7326c30109c553382 (diff) | |
arm64: dts: qcom: sm6375: Add TSENS
Add nodes for the two TSENS v2.8.0 controllers present on the SoC.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230303-topic-sm6375_features0_dts-v2-10-708b8191f7eb@linaro.org
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6375.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi index a5dde682ede0..bf95608e1116 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -771,6 +771,28 @@ #interrupt-cells = <4>; }; + tsens0: thermal-sensor@4411000 { + compatible = "qcom,sm6375-tsens", "qcom,tsens-v2"; + reg = <0 0x04411000 0 0x140>, /* TM */ + <0 0x04410000 0 0x20>; /* SROT */ + interrupts = <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + #qcom,sensors = <15>; + }; + + tsens1: thermal-sensor@4413000 { + compatible = "qcom,sm6375-tsens", "qcom,tsens-v2"; + reg = <0 0x04413000 0 0x140>, /* TM */ + <0 0x04412000 0 0x20>; /* SROT */ + interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + #qcom,sensors = <11>; + }; + rpm_msg_ram: sram@45f0000 { compatible = "qcom,rpm-msg-ram"; reg = <0 0x045f0000 0 0x7000>; |