diff options
| author | Ville Syrjälä <[email protected]> | 2022-03-09 18:49:46 +0200 |
|---|---|---|
| committer | Tvrtko Ursulin <[email protected]> | 2022-03-21 11:47:56 +0000 |
| commit | 3ef8b5e19ead5a79600ea55f9549658281415893 (patch) | |
| tree | 0dc7d89486002ac02ded764be053f7172bb93478 | |
| parent | 1937f3feb0e84089ae4065e09c871b8ab4676f01 (diff) | |
drm/i915: Fix PSF GV point mask when SAGV is not possible
Don't just mask off all the PSF GV points when SAGV gets disabled.
This should in fact cause the Pcode to reject the request since
at least one PSF point must remain enabled at all times.
Cc: [email protected]
Cc: Stanislav Lisovskiy <[email protected]>
Fixes: 192fbfb76744 ("drm/i915: Implement PSF GV point support")
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Stanislav Lisovskiy <[email protected]>
(cherry picked from commit 0fed4ddd18f064d2359b430c6e83ee60dd1f49b1)
Signed-off-by: Tvrtko Ursulin <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index ad1564ca7269..adf58c58513b 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -992,7 +992,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state) * cause. */ if (!intel_can_enable_sagv(dev_priv, new_bw_state)) { - allowed_points = BIT(max_bw_point); + allowed_points &= ADLS_PSF_PT_MASK; + allowed_points |= BIT(max_bw_point); drm_dbg_kms(&dev_priv->drm, "No SAGV, using single QGV point %d\n", max_bw_point); } |