diff options
| author | Sean Anderson <[email protected]> | 2024-05-31 12:13:31 -0400 | 
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2024-08-22 13:38:04 -0500 | 
| commit | 3e47bcc9b77df6c00bfa1e464a8f68b632f811f5 (patch) | |
| tree | e8bc5f8d491526e7dda865d9f862ee624385f354 | |
| parent | cfd67903977b13f63340a4eb5a1cc890994f2c62 (diff) | |
dt-bindings: pci: xilinx-nwl: Add phys property
Add phys properties so Linux can power-on/configure the GTR transceivers
(xlnx,zynqmp-psgtr-v1.1).
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Sean Anderson <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Rob Herring (Arm) <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 7 | 
1 files changed, 7 insertions, 0 deletions
| diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml index 9cad860c51a3..9de3c09efb6e 100644 --- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml @@ -61,6 +61,11 @@ properties:    interrupt-map:      maxItems: 4 +  phys: +    minItems: 1 +    maxItems: 4 +    description: One phy per logical lane, in order +    power-domains:      maxItems: 1 @@ -110,6 +115,7 @@ examples:    - |      #include <dt-bindings/interrupt-controller/arm-gic.h>      #include <dt-bindings/interrupt-controller/irq.h> +    #include <dt-bindings/phy/phy.h>      #include <dt-bindings/power/xlnx-zynqmp-power.h>      soc {          #address-cells = <2>; @@ -138,6 +144,7 @@ examples:                              <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,                              <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;              msi-parent = <&nwl_pcie>; +            phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>;              power-domains = <&zynqmp_firmware PD_PCIE>;              iommus = <&smmu 0x4d0>;              pcie_intc: legacy-interrupt-controller { |