diff options
| author | Krzysztof Kozlowski <[email protected]> | 2022-12-28 15:09:15 +0100 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-01-10 22:43:01 -0600 |
| commit | 3db8732c55c0109ea3a9ff9cadc10871eaba058c (patch) | |
| tree | a985f28451ac47dd04880a876eb0794244f4854f | |
| parent | 3c4af3ab1f68ddceb548094d680bc71806a09aee (diff) | |
dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se input
Drop unused core_bi_pll_test_se clock input to the clock controller.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml index 703d9e075247..b4fdde71ef18 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml @@ -23,7 +23,6 @@ properties: items: - description: Board XO source - description: Sleep clock source - - description: PLL test clock source (Optional clock) - description: PCIE 0 Pipe clock source (Optional clock) - description: PCIE 1 Pipe clock source (Optional clock) - description: UFS card Rx symbol 0 clock source (Optional clock) @@ -40,7 +39,6 @@ properties: items: - const: bi_tcxo - const: sleep_clk - - const: core_bi_pll_test_se # Optional clock - const: pcie_0_pipe_clk # Optional clock - const: pcie_1_pipe_clk # Optional clock - const: ufs_card_rx_symbol_0_clk # Optional clock |