diff options
| author | Eugen Hristev <[email protected]> | 2022-11-24 17:46:10 +0200 |
|---|---|---|
| committer | Claudiu Beznea <[email protected]> | 2022-11-25 10:33:17 +0200 |
| commit | 3cf2291777abefe94b453d1d886e8a11f024912c (patch) | |
| tree | ffdfef6e07adb467b33924951845645c85055bff | |
| parent | 7a3c62678699d7e56736c2d0579d077a7773e77c (diff) | |
ARM: dts: at91: sama7g5ek: align power rails for sdmmc0/1
On this board SDMMC0 has a 1.8 signaled eMMC device powered at
3.3V. Hence, correctly describe the connected rails from the PMIC.
SDMMC1 is connected to a voltage switch that can change from
3.3V to 1.8V by a hardware controlled pin.
However SDMMC1 at the moment works only in 3.3V mode (default speed,
no UHS-I modes), thus connect the signaling to the 3.3V rail.
Signed-off-by: Eugen Hristev <[email protected]>
[claudiu.beznea: reshaped a bit the commit message]
Signed-off-by: Claudiu Beznea <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm/boot/dts/at91-sama7g5ek.dts | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index 3b25c67795dd..aa5cc0e98bba 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -764,8 +764,9 @@ &sdmmc0 { bus-width = <8>; non-removable; - no-1-8-v; sdhci-caps-mask = <0x0 0x00200000>; + vmmc-supply = <&vdd_3v3>; + vqmmc-supply = <&vldo1>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; @@ -775,6 +776,8 @@ bus-width = <4>; no-1-8-v; sdhci-caps-mask = <0x0 0x00200000>; + vmmc-supply = <&vdd_3v3>; + vqmmc-supply = <&vdd_3v3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "okay"; |