aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorKan Liang <[email protected]>2021-06-30 14:08:27 -0700
committerPeter Zijlstra <[email protected]>2021-07-02 15:58:37 +0200
commit3ba7095beaec1bace1b5864fa92b2b7a0eaadf38 (patch)
treec1c4c5569f2f229b635f15093fc76d5ee5f988cd
parent949b11381f81664df3997db2ae0ec9546ab6dd85 (diff)
perf/x86/intel/uncore: Add Sapphire Rapids server IIO support
The IIO stacks are responsible for managing the traffic between the PCI Express* (PCIe*) domain and the mesh domain. The IIO PMON block is situated near the IIO stacks traffic controller capturing the traffic controller as well as the PCIe* root port information. The layout of the control registers for a IIO uncore unit is a little bit different from the generic one. Signed-off-by: Kan Liang <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Reviewed-by: Andi Kleen <[email protected]> Link: https://lore.kernel.org/r/[email protected]
-rw-r--r--arch/x86/events/intel/uncore_snbep.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 8a470d24ae6f..3b4039577f09 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -5596,11 +5596,18 @@ static struct intel_uncore_type spr_uncore_chabox = {
.format_group = &spr_uncore_chabox_format_group,
};
+static struct intel_uncore_type spr_uncore_iio = {
+ .name = "iio",
+ .event_mask = SNBEP_PMON_RAW_EVENT_MASK,
+ .event_mask_ext = SNR_IIO_PMON_RAW_EVENT_MASK_EXT,
+ .format_group = &snr_uncore_iio_format_group,
+};
+
#define UNCORE_SPR_NUM_UNCORE_TYPES 12
static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = {
&spr_uncore_chabox,
- NULL,
+ &spr_uncore_iio,
NULL,
NULL,
NULL,