diff options
| author | Krzysztof Kozlowski <[email protected]> | 2024-03-13 20:11:48 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <[email protected]> | 2024-03-25 11:56:44 +0100 |
| commit | 3a64e95e1a64a2d4c63c4df28b61cd3cbb63cd92 (patch) | |
| tree | a0202c9b52ffa4656cea19cb73942368a0248ffa | |
| parent | e8b41d201f82127b05bee204db92e7f97c65cf8e (diff) | |
ARM: dts: samsung: s5pv210: correct onenand size-cells
Children of NAND controllers have only chip select, so address without
the size. Correct size-cells as reported by dtbs_check:
s5pv210-galaxys.dtb: onenand@b0600000: #size-cells:0:0: 0 was expected
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
| -rw-r--r-- | arch/arm/boot/dts/samsung/s5pv210.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi index 23459430410f..9720573d84dc 100644 --- a/arch/arm/boot/dts/samsung/s5pv210.dtsi +++ b/arch/arm/boot/dts/samsung/s5pv210.dtsi @@ -82,7 +82,7 @@ clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; clock-names = "bus", "onenand"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; status = "disabled"; }; |