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authorJonathan Neuschäfer <[email protected]>2022-11-05 19:59:08 +0100
committerJoel Stanley <[email protected]>2022-11-22 12:07:20 +1030
commit38abcb0d68767ac64e5650cbf7daafb428002590 (patch)
tree716f40809b062586f42233b7d884a938deb1dae7
parentea3ce4cf076ba11bb591c8013c5315136cae52c8 (diff)
ARM: dts: wpcm450: Add FIU SPI controller node
Add the SPI controller (FIU, Flash Interface Unit) to the WPCM450 devicetree, according to the newly defined binding, as well as the SHM (shared memory interface) syscon. Signed-off-by: Jonathan Neuschäfer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
-rw-r--r--arch/arm/boot/dts/nuvoton-wpcm450.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index 93595850a4c3..0adf0a7a6a7f 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -456,5 +456,21 @@
function = "hg7";
};
};
+
+ fiu: spi-controller@c8000000 {
+ compatible = "nuvoton,wpcm450-fiu";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
+ reg-names = "control", "memory";
+ clocks = <&clk 0>;
+ status = "disabled";
+ };
+
+ shm: syscon@c8001000 {
+ compatible = "nuvoton,wpcm450-shm", "syscon";
+ reg = <0xc8001000 0x1000>;
+ reg-io-width = <1>;
+ };
};
};