diff options
| author | Arnd Bergmann <[email protected]> | 2022-11-22 22:36:04 +0100 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2022-11-22 22:36:04 +0100 |
| commit | 381abc230be01839362f8a28bcb9d30e1ee88aad (patch) | |
| tree | 068ac26337371b884d9182b2e920afb078b3730c | |
| parent | a6eeafba1141c48b0b38e96f1aa715de4035b6d5 (diff) | |
| parent | 1d9e77b644d2e5c49e6d35f77684bd260ad98557 (diff) | |
Merge tag 'tegra-for-6.2-clk-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
clk: tegra: Changes for v6.2-rc1
Implements new ABI flags for certain clocks for which the parent rate
or clock state cannot be changed.
* tag 'tegra-for-6.2-clk-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: Support BPMP-FW ABI deny flags
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
| -rw-r--r-- | drivers/clk/tegra/clk-bpmp.c | 37 |
1 files changed, 34 insertions, 3 deletions
diff --git a/drivers/clk/tegra/clk-bpmp.c b/drivers/clk/tegra/clk-bpmp.c index d82a71f10c2c..0ecdffaa6b16 100644 --- a/drivers/clk/tegra/clk-bpmp.c +++ b/drivers/clk/tegra/clk-bpmp.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2016-2020 NVIDIA Corporation + * Copyright (C) 2016-2022 NVIDIA Corporation */ #include <linux/clk-provider.h> @@ -310,6 +310,23 @@ static const struct clk_ops tegra_bpmp_clk_mux_rate_ops = { .set_rate = tegra_bpmp_clk_set_rate, }; +static const struct clk_ops tegra_bpmp_clk_mux_read_only_ops = { + .get_parent = tegra_bpmp_clk_get_parent, + .recalc_rate = tegra_bpmp_clk_recalc_rate, +}; + +static const struct clk_ops tegra_bpmp_clk_read_only_ops = { + .recalc_rate = tegra_bpmp_clk_recalc_rate, +}; + +static const struct clk_ops tegra_bpmp_clk_gate_mux_read_only_ops = { + .prepare = tegra_bpmp_clk_prepare, + .unprepare = tegra_bpmp_clk_unprepare, + .is_prepared = tegra_bpmp_clk_is_prepared, + .recalc_rate = tegra_bpmp_clk_recalc_rate, + .get_parent = tegra_bpmp_clk_get_parent, +}; + static int tegra_bpmp_clk_get_max_id(struct tegra_bpmp *bpmp) { struct cmd_clk_get_max_clk_id_response response; @@ -510,8 +527,22 @@ tegra_bpmp_clk_register(struct tegra_bpmp *bpmp, memset(&init, 0, sizeof(init)); init.name = info->name; clk->hw.init = &init; - - if (info->flags & TEGRA_BPMP_CLK_HAS_MUX) { + if (info->flags & BPMP_CLK_STATE_CHANGE_DENIED) { + if ((info->flags & BPMP_CLK_RATE_PARENT_CHANGE_DENIED) == 0) { + dev_WARN(bpmp->dev, + "Firmware bug! Inconsistent permission bits for clock %s. State and parent/rate changes disabled.", + init.name); + } + if (info->flags & TEGRA_BPMP_CLK_HAS_MUX) + init.ops = &tegra_bpmp_clk_mux_read_only_ops; + else + init.ops = &tegra_bpmp_clk_read_only_ops; + } else if (info->flags & BPMP_CLK_RATE_PARENT_CHANGE_DENIED) { + if (info->flags & TEGRA_BPMP_CLK_HAS_MUX) + init.ops = &tegra_bpmp_clk_gate_mux_read_only_ops; + else + init.ops = &tegra_bpmp_clk_gate_ops; + } else if (info->flags & TEGRA_BPMP_CLK_HAS_MUX) { if (info->flags & TEGRA_BPMP_CLK_HAS_SET_RATE) init.ops = &tegra_bpmp_clk_mux_rate_ops; else |