diff options
| author | Rayyan Ansari <[email protected]> | 2024-07-22 10:18:50 +0100 |
|---|---|---|
| committer | Krzysztof Wilczyński <[email protected]> | 2024-09-04 15:10:48 +0000 |
| commit | 364cfd8a56c0eec874057514b8cee220494746f5 (patch) | |
| tree | a9f96b11f8c2b486abca8a56c6eab38628383eff | |
| parent | f66b63ef10d65cf8ce57a7341262308443705628 (diff) | |
dt-bindings: PCI: qcom,pcie-sc7280: Update bindings adding eight interrupts
Previous commit to this bindings, commit 756485bfbb85 ("dt-bindings:
PCI: qcom,pcie-sc7280: Move SC7280 to dedicated schema"), updated the
bindings to specify one interrupt only, as the devicetree at that time
did not describe the hardware fully.
The devicetree for SC7280 now specifies eight interrupts, following the
commit b8ba66b40da3 ("arm64: dts: qcom: sc7280: Add additional MSI
interrupts").
Thus, update the bindings to reflect this.
Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Rayyan Ansari <[email protected]>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml index 634da24ec3ed..5cf1f9165301 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml @@ -53,11 +53,19 @@ properties: - const: aggre1 # Aggre NoC PCIe1 AXI clock interrupts: - maxItems: 1 + minItems: 8 + maxItems: 8 interrupt-names: items: - - const: msi + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 resets: maxItems: 1 @@ -137,8 +145,16 @@ examples: dma-coherent; - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi0", "msi1", "msi2", "msi3", + "msi4", "msi5", "msi6", "msi7"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, |