diff options
| author | Dmitry Baryshkov <[email protected]> | 2021-07-10 00:07:24 +0300 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2021-08-05 10:27:35 -0500 |
| commit | 3289022b32985871cdb5e82d3473eafac6033869 (patch) | |
| tree | 559fba2869bedc3993778436c1a350ded3416b82 | |
| parent | b547b216228fde064e196838f695c2b0d6c110ae (diff) | |
arm64: dts: qcom: sdm845: assign DSI clock source parents
Assign DSI clock source parents to DSI PHY clocks.
Signed-off-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Abhinav Kumar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 6bd05f62bb05..ff6bda15ae04 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4255,6 +4255,9 @@ "core", "iface", "bus"; + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; + operating-points-v2 = <&dsi_opp_table>; power-domains = <&rpmhpd SDM845_CX>; @@ -4321,6 +4324,9 @@ "core", "iface", "bus"; + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; + assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; + operating-points-v2 = <&dsi_opp_table>; power-domains = <&rpmhpd SDM845_CX>; |