diff options
author | Johan Hovold <[email protected]> | 2022-09-19 11:44:51 +0200 |
---|---|---|
committer | Bjorn Andersson <[email protected]> | 2022-10-17 15:11:11 -0500 |
commit | 31b3b3059791be536e2ec0c6830767b596af340f (patch) | |
tree | cd83a0e45be93133b0fcfb5ab6bc3dfc03b672c9 | |
parent | f3aa975e230e060c07dcfdf3fe92b59809422c13 (diff) |
arm64: dts: qcom: sc8280xp: fix USB0 PHY PCS_MISC registers
The USB0 SS PHY node had the PCS_MISC register block (0x1200) replaced
with PCS_USB (0x1700).
Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index f5824f44e15f..cab9965fe0f8 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1184,7 +1184,7 @@ <0 0x088ec400 0 0x1f0>, <0 0x088eba00 0 0x100>, <0 0x088ebc00 0 0x3ec>, - <0 0x088ec700 0 0x64>; + <0 0x088ec200 0 0x18>; #phy-cells = <0>; #clock-cells = <0>; clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; |