diff options
| author | Arnd Bergmann <[email protected]> | 2023-08-12 10:44:45 +0200 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2023-08-12 10:44:46 +0200 |
| commit | 2fec32345e82ba636fe36d3c958ea75dbaac13be (patch) | |
| tree | ad666cab39aa569338487998e734491843b6cb87 | |
| parent | e5963e159655253cf6f106c6eed4557290696783 (diff) | |
| parent | cc958441ed412f74049c0c00c97f1310d941f9ff (diff) | |
Merge tag 'juno-update-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
Armv8 Juno/FVP update for v6.6
Just a single minor whitespace cleanup in couple of FVP device trees.
* tag 'juno-update-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: arm: minor whitespace cleanup around '='
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/arm/corstone1000.dtsi | 20 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi | 10 |
2 files changed, 13 insertions, 17 deletions
diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi index 21f1f952e985..34bc336ba8d1 100644 --- a/arch/arm64/boot/dts/arm/corstone1000.dtsi +++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi @@ -43,10 +43,10 @@ #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; - reg = <0x1c010000 0x1000>, - <0x1c02f000 0x2000>, - <0x1c04f000 0x1000>, - <0x1c06f000 0x2000>; + reg = <0x1c010000 0x1000>, + <0x1c02f000 0x2000>, + <0x1c04f000 0x1000>, + <0x1c06f000 0x2000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; @@ -77,14 +77,10 @@ timer { compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | - IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | - IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | - IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | - IRQ_TYPE_LEVEL_LOW)>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; uartclk: uartclk { diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi index e4a3c7dbcc20..17fba3bc99cd 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi @@ -12,11 +12,11 @@ #size-cells = <1>; ranges = <0x0 0x0 0x2f000000 0x100000>; interrupt-controller; - reg = <0x0 0x2f000000 0x0 0x10000>, - <0x0 0x2f100000 0x0 0x200000>, - <0x0 0x2c000000 0x0 0x2000>, - <0x0 0x2c010000 0x0 0x2000>, - <0x0 0x2c02f000 0x0 0x2000>; + reg = <0x0 0x2f000000 0x0 0x10000>, + <0x0 0x2f100000 0x0 0x200000>, + <0x0 0x2c000000 0x0 0x2000>, + <0x0 0x2c010000 0x0 0x2000>, + <0x0 0x2c02f000 0x0 0x2000>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; its: msi-controller@2f020000 { |