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authorLiu, Zhan <[email protected]>2021-09-02 15:08:29 -0400
committerAlex Deucher <[email protected]>2021-10-05 10:17:50 -0400
commit2fe9a0e1173f4805669e7af34ea25af835274426 (patch)
tree8bd6024afa143ee10d75a7707f02660e6e03c6a4
parent45d65c0f09aaa6cdd21fe0743f317d4bbdfd1466 (diff)
drm/amd/display: Fix DCN3 B0 DP Alt Mapping
[Why] DCN3 B0 has a mux, which redirects PHYC and PHYD to PHYF and PHYG. [How] Fix DIG mapping. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Zhan Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] (cherry picked from commit 4b7786d87fb3adf3e534c4f1e4f824d8700b786b)
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
index a7702d3c75cd..cb50e6eda47e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
@@ -1284,6 +1284,12 @@ static struct stream_encoder *dcn31_stream_encoder_create(
if (!enc1 || !vpg || !afmt)
return NULL;
+ if (ctx->asic_id.chip_family == FAMILY_YELLOW_CARP &&
+ ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) {
+ if ((eng_id == ENGINE_ID_DIGC) || (eng_id == ENGINE_ID_DIGD))
+ eng_id = eng_id + 3; // For B0 only. C->F, D->G.
+ }
+
dcn30_dio_stream_encoder_construct(enc1, ctx, ctx->dc_bios,
eng_id, vpg, afmt,
&stream_enc_regs[eng_id],