diff options
| author | Naga Sureshkumar Relli <[email protected]> | 2022-08-08 12:16:01 +0530 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2022-08-15 12:17:37 +0100 |
| commit | 2ba464e5a3b5743e8f935b5a02b9a7c3d2bd9549 (patch) | |
| tree | e16e86284cfa7ad20e8b8de62034c16a7323b235 | |
| parent | a5890c12ecce2696f90ef7d2b8fbb33387f735de (diff) | |
spi: dt-binding: add coreqspi as a fallback for mpfs-qspi
Microchip's PolarFire SoC QSPI IP core is based on coreQSPI,
so add coreqspi as a fallback to mpfs-qspi.
Signed-off-by: Naga Sureshkumar Relli <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml index a47d4923b51b..1051690e3753 100644 --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml @@ -18,10 +18,12 @@ allOf: properties: compatible: - enum: - - microchip,mpfs-spi - - microchip,mpfs-qspi - - microchip,coreqspi-rtl-v2 # FPGA QSPI + oneOf: + - items: + - const: microchip,mpfs-qspi + - const: microchip,coreqspi-rtl-v2 + - const: microchip,coreqspi-rtl-v2 #FPGA QSPI + - const: microchip,mpfs-spi reg: maxItems: 1 |