diff options
| author | Sebastian Reichel <[email protected]> | 2023-06-12 19:13:33 +0200 |
|---|---|---|
| committer | Damien Le Moal <[email protected]> | 2023-06-23 09:33:53 +0900 |
| commit | 2b3665b2971d2c67dd7a7a9171b06cb48fa393db (patch) | |
| tree | 8a64de766bec3a1c530e1e7559e6f51371380230 | |
| parent | b3f993c7e7a29d1e119c3d8ec6cdeeaae25afba7 (diff) | |
dt-bindings: ata: dwc-ahci: add PHY clocks
Add PHY transmit and receive clocks as described by the
DW SATA AHCI HW manual.
Suggested-by: Serge Semin <[email protected]>
Reviewed-by: Serge Semin <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Sebastian Reichel <[email protected]>
Signed-off-by: Damien Le Moal <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml index c1457910520b..34c5bf65b02d 100644 --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml @@ -31,11 +31,11 @@ properties: PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) clock, etc. minItems: 1 - maxItems: 4 + maxItems: 6 clock-names: minItems: 1 - maxItems: 4 + maxItems: 6 items: oneOf: - description: Application APB/AHB/AXI BIU clock @@ -48,6 +48,10 @@ properties: const: pmalive - description: RxOOB detection clock const: rxoob + - description: PHY Transmit Clock + const: asic + - description: PHY Receive Clock + const: rbc - description: SATA Ports reference clock const: ref |