diff options
| author | Mark Rutland <[email protected]> | 2021-10-19 17:02:12 +0100 |
|---|---|---|
| committer | Will Deacon <[email protected]> | 2021-10-21 10:45:22 +0100 |
| commit | 286fba6c2a4566f02d4568e655a88e43ffee66d3 (patch) | |
| tree | 45ff3839ffada6d48e3e4317442db060bc702ef5 | |
| parent | 8ed1b498ada6c5bd9d9f53c59621734551829ec5 (diff) | |
arm64: gpr-num: support W registers
In subsequent patches we'll want to map W registers to their register
numbers. Update gpr-num.h so that we can do this.
Signed-off-by: Mark Rutland <[email protected]>
Reviewed-by: Ard Biesheuvel <[email protected]>
Cc: Catalin Marinas <[email protected]>
Cc: James Morse <[email protected]>
Cc: Robin Murphy <[email protected]>
Cc: Will Deacon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
| -rw-r--r-- | arch/arm64/include/asm/gpr-num.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/gpr-num.h b/arch/arm64/include/asm/gpr-num.h index f936aa34dc63..05da4a7c5788 100644 --- a/arch/arm64/include/asm/gpr-num.h +++ b/arch/arm64/include/asm/gpr-num.h @@ -6,16 +6,20 @@ .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 .equ .L__gpr_num_x\num, \num + .equ .L__gpr_num_w\num, \num .endr .equ .L__gpr_num_xzr, 31 + .equ .L__gpr_num_wzr, 31 #else /* __ASSEMBLY__ */ #define __DEFINE_ASM_GPR_NUMS \ " .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n" \ " .equ .L__gpr_num_x\\num, \\num\n" \ +" .equ .L__gpr_num_w\\num, \\num\n" \ " .endr\n" \ -" .equ .L__gpr_num_xzr, 31\n" +" .equ .L__gpr_num_xzr, 31\n" \ +" .equ .L__gpr_num_wzr, 31\n" #endif /* __ASSEMBLY__ */ |