diff options
| author | Arnd Bergmann <[email protected]> | 2022-11-21 10:49:40 +0100 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2022-11-21 10:49:41 +0100 |
| commit | 267511c9778b76aa2a85c9d707a04dd1eedfd608 (patch) | |
| tree | 7ce69ad0217dba890722dc579c7cc4b9d6fef16c | |
| parent | 1d4456221fe394eab50b4ce7902b5c76cf650c00 (diff) | |
| parent | 1776fca7fadbac2260a22e2ecb708e8a1ba9310d (diff) | |
Merge tag 'renesas-riscv-defconfig-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig
Renesas RISC-V defconfig updates for v6.2
- Enable support for the Renesas RZ/Five SoC and the RZ/Five SMARC EVK
board in the risc-v defconfig.
* tag 'renesas-riscv-defconfig-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
riscv: configs: defconfig: Enable Renesas RZ/Five SoC
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
| -rw-r--r-- | arch/riscv/configs/defconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 05fd5fcf24f9..f7f32448f160 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -26,6 +26,7 @@ CONFIG_EXPERT=y # CONFIG_SYSFS_SYSCALL is not set CONFIG_PROFILING=y CONFIG_SOC_MICROCHIP_POLARFIRE=y +CONFIG_ARCH_RENESAS=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_STARFIVE=y CONFIG_SOC_VIRT=y @@ -123,6 +124,7 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_SH_SCI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y @@ -159,6 +161,7 @@ CONFIG_VIRTIO_MMIO=y CONFIG_RPMSG_CHAR=y CONFIG_RPMSG_CTRL=y CONFIG_RPMSG_VIRTIO=y +CONFIG_ARCH_R9A07G043=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y |