diff options
author | Mike Travis <[email protected]> | 2018-10-02 13:01:46 -0500 |
---|---|---|
committer | Thomas Gleixner <[email protected]> | 2018-10-02 21:29:16 +0200 |
commit | 2647c43c7f3ba4b752bfce261d53b16e2f5bc9e3 (patch) | |
tree | 461a78b5c17f7f48c8790bba4b168418ba4d07c9 | |
parent | 20a8378aa9dd108a01cb0e695599f5257a885c4b (diff) |
x86/tsc: Fix UV TSC initialization
The recent rework of the TSC calibration code introduced a regression on UV
systems as it added a call to tsc_early_init() which initializes the TSC
ADJUST values before acpi_boot_table_init(). In the case of UV systems,
that is a necessary step that calls uv_system_init(). This informs
tsc_sanitize_first_cpu() that the kernel runs on a platform with async TSC
resets as documented in commit 341102c3ef29 ("x86/tsc: Add option that TSC
on Socket 0 being non-zero is valid")
Fix it by skipping the early tsc initialization on UV systems and let TSC
init tests take place later in tsc_init().
Fixes: cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once")
Suggested-by: Hedi Berriche <[email protected]>
Signed-off-by: Mike Travis <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Russ Anderson <[email protected]>
Reviewed-by: Dimitri Sivanich <[email protected]>
Cc: "H. Peter Anvin" <[email protected]>
Cc: Russ Anderson <[email protected]>
Cc: Dimitri Sivanich <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: Kate Stewart <[email protected]>
Cc: Greg Kroah-Hartman <[email protected]>
Cc: Philippe Ombredanne <[email protected]>
Cc: Pavel Tatashin <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Len Brown <[email protected]>
Cc: Dou Liyang <[email protected]>
Cc: Xiaoming Gao <[email protected]>
Cc: Rajvi Jingar <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
-rw-r--r-- | arch/x86/kernel/tsc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 6490f618e096..b52bd2b6cdb4 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -26,6 +26,7 @@ #include <asm/apic.h> #include <asm/intel-family.h> #include <asm/i8259.h> +#include <asm/uv/uv.h> unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */ EXPORT_SYMBOL(cpu_khz); @@ -1433,6 +1434,9 @@ void __init tsc_early_init(void) { if (!boot_cpu_has(X86_FEATURE_TSC)) return; + /* Don't change UV TSC multi-chassis synchronization */ + if (is_early_uv_system()) + return; if (!determine_cpu_tsc_frequencies(true)) return; loops_per_jiffy = get_loops_per_jiffy(); |