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authorDaniel J Blueman <[email protected]>2014-11-04 16:29:42 +0800
committerThomas Gleixner <[email protected]>2014-11-04 18:17:27 +0100
commit25e5a76bae106e1673887db09e22b19cb1a86c45 (patch)
tree49e25e5700355e99b6bfea32f2c10a2c74f9e5bf
parent00e7977dd1bbd46e336d7ef907d0fb6b6a4c294f (diff)
x86: numachip: Elide self-IPI ICR polling
The default self-IPI path polls the ICR to delay sending the IPI until there is no IPI in progress. This is redundant on x86-86 APICs, since IPIs are queued. See the AMD64 Architecture Programmer's Manual, vol 2, p525. Signed-off-by: Daniel J Blueman <[email protected]> Cc: Steffen Persvold <[email protected]> Cc: Bjorn Helgaas <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
-rw-r--r--arch/x86/kernel/apic/apic_numachip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index 2aaee79fb129..7a3191232630 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -145,7 +145,7 @@ static void numachip_send_IPI_all(int vector)
static void numachip_send_IPI_self(int vector)
{
- __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
+ apic_write(APIC_SELF_IPI, vector);
}
static int __init numachip_probe(void)