diff options
| author | Imran Shaik <[email protected]> | 2023-08-03 16:27:36 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-08-13 20:13:17 -0700 |
| commit | 2524dae5cd453ca39e8ba1b95c2755a8a2d94059 (patch) | |
| tree | d749daabc2083678c15705299f551446bbfda8dc | |
| parent | b311f5d3c4749259043a9a458a8db07915210142 (diff) | |
clk: qcom: gcc-qdu1000: Fix clkref clocks handling
Update the GCC clkref clock's halt_check to BRANCH_HALT, as it's
status bit is not inverted in the latest hardware version of QDU1000
and QRU1000 SoCs. While at it, fix the gcc clkref clock ops as well.
Fixes: 1c9efb0bc040 ("clk: qcom: Add QDU1000 and QRU1000 GCC support")
Signed-off-by: Imran Shaik <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
| -rw-r--r-- | drivers/clk/qcom/gcc-qdu1000.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/clk/qcom/gcc-qdu1000.c b/drivers/clk/qcom/gcc-qdu1000.c index c00d26a3e6df..8df7b7983968 100644 --- a/drivers/clk/qcom/gcc-qdu1000.c +++ b/drivers/clk/qcom/gcc-qdu1000.c @@ -1447,14 +1447,13 @@ static struct clk_branch gcc_pcie_0_cfg_ahb_clk = { static struct clk_branch gcc_pcie_0_clkref_en = { .halt_reg = 0x9c004, - .halt_bit = 31, - .halt_check = BRANCH_HALT_ENABLE, + .halt_check = BRANCH_HALT, .clkr = { .enable_reg = 0x9c004, .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data) { .name = "gcc_pcie_0_clkref_en", - .ops = &clk_branch_ops, + .ops = &clk_branch2_ops, }, }, }; @@ -2274,14 +2273,13 @@ static struct clk_branch gcc_tsc_etu_clk = { static struct clk_branch gcc_usb2_clkref_en = { .halt_reg = 0x9c008, - .halt_bit = 31, - .halt_check = BRANCH_HALT_ENABLE, + .halt_check = BRANCH_HALT, .clkr = { .enable_reg = 0x9c008, .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data) { .name = "gcc_usb2_clkref_en", - .ops = &clk_branch_ops, + .ops = &clk_branch2_ops, }, }, }; |