diff options
| author | Neil Armstrong <[email protected]> | 2023-06-19 10:07:16 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-07-31 14:19:46 -0700 |
| commit | 243f1a6d3df947874827a9a8837145621cbef7d3 (patch) | |
| tree | a2d0aab09af8909b0bb8e301a00d26f5d21f06b8 | |
| parent | f9568d22ce06192a7e14bda3a29dc216659554ff (diff) | |
arm64: dts: qcom: sm8550: add ports subnodes in usb/dp qmpphy node
Add the USB3+DP Combo QMP PHY port subnodes in the SM8550 SoC DTSI
to avoid duplication in the devices DTs.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-type-c-v5-4-9221cd300903@linaro.org
Signed-off-by: Bjorn Andersson <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8550.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index c93ab3724eb4..d115960bdeec 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2839,6 +2839,32 @@ #phy-cells = <1>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_dp_qmpphy_out: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_dp_qmpphy_usb_ss_in: endpoint { + }; + }; + + port@2 { + reg = <2>; + + usb_dp_qmpphy_dp_in: endpoint { + }; + }; + }; }; usb_1: usb@a6f8800 { |