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authorAndre Przywara <[email protected]>2020-04-30 22:10:54 +0100
committerRob Herring <[email protected]>2020-05-03 11:10:42 -0500
commit2407fcb81b566b68512df8ebdc85cd2e7f64bef9 (patch)
tree6dc3b27b6782a7a18f3036921acf2973d7ce7755
parentfdab2dc5bc44abe81853064e717cfbfd4c1959f8 (diff)
dt-bindings: arm: Add Calxeda system registers json-schema binding
The Calxeda system registers are a collection of MMIO register controlling several more general aspects of the SoC. Beside for some power management tasks this node is also somewhat abused as the container for the clock nodes. Add a binding in DT schema format using json-schema. Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Rob Herring <[email protected]>
-rw-r--r--Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml49
1 files changed, 49 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml b/Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml
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+++ b/Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/calxeda/hb-sregs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Calxeda Highbank system registers
+
+description: |
+ The Calxeda Highbank system has a block of MMIO registers controlling
+ several generic system aspects. Those can be used to control some power
+ management, they also contain some gate and PLL clocks.
+
+maintainers:
+ - Andre Przywara <[email protected]>
+
+properties:
+ compatible:
+ const: calxeda,hb-sregs
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ type: object
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ sregs@fff3c000 {
+ compatible = "calxeda,hb-sregs";
+ reg = <0xfff3c000 0x1000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ osc: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <33333000>;
+ };
+ };
+ };