diff options
| author | Konrad Dybcio <[email protected]> | 2023-07-25 10:51:56 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-07-27 20:28:15 -0700 |
| commit | 20e1d75bc043c5ec1fd8f5169fde17db89eb11c3 (patch) | |
| tree | 42005123387dda499ba04c8b60e542475461ffe4 | |
| parent | a9f71a033587c9074059132d34c74eabbe95ef26 (diff) | |
clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs
The DISP_CC GDSCs have not been instructed to use the ret registers.
Fix that.
Fixes: 4a66e76fdb6d ("clk: qcom: Add SC8280XP display clock controller")
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
| -rw-r--r-- | drivers/clk/qcom/dispcc-sc8280xp.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/qcom/dispcc-sc8280xp.c b/drivers/clk/qcom/dispcc-sc8280xp.c index 167470beb369..30f636b9f0ec 100644 --- a/drivers/clk/qcom/dispcc-sc8280xp.c +++ b/drivers/clk/qcom/dispcc-sc8280xp.c @@ -3057,7 +3057,7 @@ static struct gdsc disp0_mdss_gdsc = { .name = "disp0_mdss_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL, + .flags = HW_CTRL | RETAIN_FF_ENABLE, }; static struct gdsc disp1_mdss_gdsc = { @@ -3069,7 +3069,7 @@ static struct gdsc disp1_mdss_gdsc = { .name = "disp1_mdss_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL, + .flags = HW_CTRL | RETAIN_FF_ENABLE, }; static struct gdsc disp0_mdss_int2_gdsc = { @@ -3081,7 +3081,7 @@ static struct gdsc disp0_mdss_int2_gdsc = { .name = "disp0_mdss_int2_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL, + .flags = HW_CTRL | RETAIN_FF_ENABLE, }; static struct gdsc disp1_mdss_int2_gdsc = { @@ -3093,7 +3093,7 @@ static struct gdsc disp1_mdss_int2_gdsc = { .name = "disp1_mdss_int2_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL, + .flags = HW_CTRL | RETAIN_FF_ENABLE, }; static struct gdsc *disp0_cc_sc8280xp_gdscs[] = { |