diff options
| author | Conor Dooley <[email protected]> | 2022-07-07 15:20:42 +0100 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2022-07-08 09:09:46 +0200 |
| commit | 2058dc831ff82eb8e93e882efd1ca964bd8a74c8 (patch) | |
| tree | ee99cf4bb0d1fa249062ba0c70ac18f984435b6d | |
| parent | fa293fb960ab8350c92e2327a08fc141f228b044 (diff) | |
MAINTAINERS: add polarfire rng, pci and clock drivers
Hardware random, PCI and clock drivers for the PolarFire SoC have been
upstreamed but are not covered by the MAINTAINERS entry, so add them.
Daire is the author of the clock & PCI drivers, so add him as a
maintainer in place of Lewis.
Signed-off-by: Conor Dooley <[email protected]>
Acked-by: Bjorn Helgaas <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Link: https://lore.kernel.org/r/[email protected]'
Signed-off-by: Arnd Bergmann <[email protected]>
| -rw-r--r-- | MAINTAINERS | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index e20124db1381..7a3eab75f967 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17202,12 +17202,15 @@ N: riscv K: riscv RISC-V/MICROCHIP POLARFIRE SOC SUPPORT -M: Lewis Hanly <[email protected]> M: Conor Dooley <[email protected]> +M: Daire McNamara <[email protected]> S: Supported F: arch/riscv/boot/dts/microchip/ +F: drivers/char/hw_random/mpfs-rng.c +F: drivers/clk/microchip/clk-mpfs.c F: drivers/mailbox/mailbox-mpfs.c +F: drivers/pci/controller/pcie-microchip-host.c F: drivers/soc/microchip/ F: include/soc/microchip/mpfs.h |