diff options
author | Krzysztof Kozlowski <[email protected]> | 2022-02-14 09:19:15 +0100 |
---|---|---|
committer | Bjorn Andersson <[email protected]> | 2022-02-24 14:01:38 -0600 |
commit | 1e49defb863638cde53e48805747271f80f9abec (patch) | |
tree | 28f3ccc3eb7f93bacde7c263d9e7d7cfb9c5eb25 | |
parent | d4b341269efb3c7fb37747064f7381c21dd7b983 (diff) |
arm64: dts: qcom: align Google CROS EC PWM node name with dtschema
dtschema expects PWM node name to be a generic "pwm". This also matches
Devicetree specification requirements about generic node names.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Douglas Anderson <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 78296ed6fd29..732e1181af48 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -637,7 +637,7 @@ pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; - cros_ec_pwm: ec-pwm { + cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; #pwm-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts index af46a60b4b98..1779d96c30f6 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts @@ -705,7 +705,7 @@ ap_ec_spi: &spi8 { pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; - cros_ec_pwm: ec-pwm { + cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; #pwm-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index 7c22f0b062be..dc17f2079695 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -421,7 +421,7 @@ ap_ec_spi: &spi10 { pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; - cros_ec_pwm: ec-pwm { + cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; #pwm-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi index 0896a6151817..a7c346aa3b02 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi @@ -20,7 +20,7 @@ ap_ec_spi: &spi10 { pinctrl-0 = <&ap_ec_int_l>; spi-max-frequency = <3000000>; - cros_ec_pwm: ec-pwm { + cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; #pwm-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi index 4a6285a25f77..e7e4cc5936aa 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi @@ -708,7 +708,7 @@ ap_ts_i2c: &i2c14 { pinctrl-0 = <&ec_ap_int_l>; spi-max-frequency = <3000000>; - cros_ec_pwm: ec-pwm { + cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; #pwm-cells = <1>; }; |